In a conventional digital data communications system, one or more data buses communicate information among the various subsystems. Each data bus commonly has eight, sixteen, thirty-two, sixty-four or even more individual data paths, which are essentially wires or semiconductor throughways.
Additionally, a data bus can be unidirectional or bidirectional. In a unidirectional configuration, the data bus is adapted to transfer information in only one direction. Often, a driver resides on one end of the data bus, while a compatible receiver resides on the other end.
In conventional implementations, the driver traditionally needs more power to operate than the receiver. Consequently, designers concerned with power consumption often focus upon the design of the driver. In order to reduce power consumption and to increase performance, "push-pull" drivers are commonly implemented, which are well known in the art.
A variety of push-pull drivers are commercially available from the various semiconductor manufacturers. For example, a model Am26LS31 push-pull driver is presently available from Advanced Micro Devices, Inc., U.S.A. As a further example, a model SN74S240 push-pull driver is readily available from Texas Instruments, Inc., U.S.A.
In a bidirectional configuration of a data bus, the data can be transmitted in both directions. Bidirectional configurations are often employed to reduce the number of interconnections between the data bus and input/output (I/O) devices. Essentially, the data bus serves as a "party line," permitting communication among various subsystems, including I/O devices, via the shared data bus. The bidirectional data bus has both a driver and a receiver, or collectively a "transceiver", at each end of the data bus. U.S. Pat. No. 4,573,168 to Henze et al. discloses a model Am26L532 driver and a model Am26L532 receiver used in combination as a transceiver at the ends of a bidirectional data bus. Furthermore, U.S. Pat. No. 4,713,827 to Lauffer et shows a bidirectional transceiver used on a data bus.
Furthermore, each data path of a conventional data bus essentially exhibits the characteristics of a transmission line. Accordingly, a characteristic impedance Z.sub.0 can be specified to characterize any data bus. The characteristic impedance Z.sub.0 is defined during design and manufacture by the choice of conductive and insulative materials, spacing of conductors, and other factors influencing the electrical characteristics of the data bus.
When information is transmitted over a data bus between two subsystems, it is extremely important to prevent "ringing" of the data bus, i.e., to minimize noise generated by undesirable electrical reflections from the driver and receiver. The ringing undesirably reduces the noise margin and affects the net performance. When a driver is in operation, an electrical termination or sink to a reference node, typically ground, optimally resides at the receiver to eliminate these reflections. To this end, the characteristic impedance Z.sub.0 of each transmission line on the data bus is typically matched with a substantially equivalent load impedance connected to the data bus and a reference mode. Most data buses have transmission lines with characteristic impedances Z.sub.0 ranging between fifty ohms and two hundred ohms.
Among others, U.S. Pat. No. 4,713,827 to Lauffer et al. and U.S. Pat. No. 4,912,724 to Wilson disclose a bidirectional bus arrangement with the use of a matching resistor. The resistor effectively terminates the line during transmission to prevent reflections.
Although conventional bidirectional data bus arrangements reduce I/O connections and other computer hardware, the bus arrangements can compromise the speed of data interactions among computer subsystems. Specifically, they generally do not permit the simultaneous exchange of digital information, and those arrangements that do, do not permit simultaneous communications in a power efficient manner and with a sufficient noise margin.
An article entitled, "Simultaneous Bidirectional Transceiver Circuit," by A. Y. Chang and P. J. Pandya, which appeared in the IBM Technical Disclosure Bulletin, Vol. 23, No. 4, pp. 1435-1437, Sep. 1980, illustrates a bidirectional transceiver circuit which is capable of simultaneously transmitting and receiving digital information over a single wire. A specialized driver having a current source is employed.
However, the disclosed transceiver undesirably draws a ground current which can generate noise and disturb other nearby receivers, (2) dissipates high power (average power consumption is about 105 milliwatts), and (3) exhibits sensitivity to switching noise, i.e., noise generated when the data switches between its states, for example, between a logic high ("1") and a logic low ("0"), or vice versa.
U.S. Pat. No. 4,698,800 to Cavaliere et al. discloses a simultaneous bidirectional transceiver circuit which is very similar to the transceiver circuit disclosed in the foregoing article. In fact, A. Y. Chang is co-author of the article and co-inventor of the patent. The patent appears to be an improvement on the transceiver circuit disclosed in the article. More specifically, the patent discloses a transceiver circuit which uses less power (about 75 milliwatts average power).
However, a specialized driver having a current source is still employed in the patented transceiver circuit. Moreover, the special driver of the transceiver circuit uses much more power than a conventional push-pull driver. Finally, the noise margin is still not ideal.
Thus, a need exists in the industry for a bidirectional data bus transceiver arrangement which provides for simultaneous communications at low power and with a sufficient noise margin.